Avoid ground loops in mixed-signal circuits part 1

Ground loops can degrade circuit performance and ruin your day. Follow these tips to prevent them from occurring in circuits that use analog and digital components.

A typical mixed-signal system — a system comprised of digital logic and analog circuitry — uses multiple power supplies. Typical voltages include +5 VDC, +3.3 VDC, and/or +1.8 VDC for the logic circuitry and ±15 VDC, ±12 VDC, +5 VDC, and/or +3.3 VDC for the analog circuitry. All these DC power supplies have a circuit common or ground return connection from the circuitry being powered back to the power source. Improper connections to return paths can result in ground loops that introduce noise, measurement errors, and EMI.

Here’s a hypothetical example. Figure 1 shows a block diagram representing a simple data-acquisition system (DAS). There are op amps and analog switches that process the incoming analog signals. An analog-to-digital converter (ADC) digitizes the signals, while a digital-to-analog converter (DAC) provides readback of the digitization. A digital logic section uses a microprocessor and some simple logic devices to control the analog switches, the ADC, the DAC, and to provide additional digital I/O functions.

Power for the analog circuitry comes from the ±12 VDC (analog) and +5 VDC (analog) supplies. Power for the digital circuitry comes from the +5 VDC (digital) and +3.3 VDC (digital) supplies. Although not shown on this block diagram and subsequent diagrams, keep in mind that proper use of decoupling capacitors from the power rails to the appropriate ground is essential.

Typically, you place capacitors as close as is practical to their respective devices. You chose capacitors values and types based on the rate that the current draw changes with respect to time (di/dt). For example, you might use a 10 µF electrolytic capacitor in parallel with a 0.1 µF ceramic capacitor from supply to ground. The electrolytic capacitor has low reactance at audio and low radio frequencies, but at higher frequencies, it starts to look inductive, so the overall impedance increases. That’s why you need to add the ceramic capacitor: It has much better performance at high frequencies.

I’ve drawn this block diagram showing all circuit common/grounds represented with one common ground symbol. For the PC board layout, how would you create the DAS ground paths or traces? You could create one gigantic ground plane with as much copper as space allows and then bond any ground (power supply return or load ground) to the ground plane. You could also run PC board traces from each section of the circuitry to the specific pertinent supply. What about the common/ground connections for the analog inputs and the digital outputs? You could connect the ground related to the analog signals to a point near the op amp circuitry or connect it to a point very near the analog power supplies. What if the analog sensors (signal sources) also have local ground connections right at the sensor, and those connections are some distance away from the DAS?

Once you figure this out, you’ll have to decide what to do with the ground connections at the ADC. Note that it’s powered by both analog and digital supplies. Some ADCs have analog ground and digital ground bonded together on the silicon chip. For others, application notes instruct the design engineer to tie the two grounds together right at the ADC package. Then, the negative connections from each of the analog and digital supplies (the DC return paths) should be isolated connections between the ADC and the supplies to ensure that they are bonded at the ADC and only there.

At this point, you will probably realize that because there are other circuit blocks in the DAS powered from multiple supplies, deciding how to run the ground between the ADC and the digital circuitry gets complicated. You will likely also realize that some of the current flow in the various grounds will create voltage (I-R) drops that cause problems. For example, if the signal ground and the ground for the +5 VDC digital supply are co-mingled, you will get significant apparent variations in the analog signals even if they are actually not varying. This is due to the constant fluctuations in current draw of the digital circuitry and the corresponding I-R drop in the copper PC board traces. Keep in mind that if the ADC in our DAS has a high bit count (i.e., the LSB is in the microvolt or nanovolt order of magnitude), small voltage disturbances in ground-referenced signals will guarantee problems.

To get a better understanding of the power and ground problems, let’s draw a simplified diagram of some possible power and ground connections (Figure 2). We’ll use some of the supplies cited above (±12 VDC analog, +5 VDC analog, +5 VDC digital, and +3.3 VDC digital). We’ll show various ground/return paths for the DC supplies, the sensor inputs, and the connections between internal subsystems to keep track of current flows.

The callouts in Figure 2 represent some possible ground connections. We will assume the connection #1b is a fixed common connection integral to the analog circuitry. Not all of the other connections will be present; your task as the design engineer is to decide which ones to keep and specifically how to arrange them. For example, we could bond all the power supply common (return) connections together with #1 and #2 right at the power supplies, which we can assume are physically close together. But there is also a bonded connection at #4 next to or inside the ADC. This produces a multipath connection and, to a lesser extent, a loop. The loop may either radiate or pick up a magnetic field from elsewhere in the system, which may be problematic. The multiple paths will certainly result in I-R drops across undefined resistances or impedance, and these drops are of a somewhat unpredictable nature.

Similarly, we could omit the #1 and #2 connections and just make use of the #4 connection. That forces the supply current for the analog circuitry to flow through connection #3, which is also the circuit common for the analog signal going to the ADC. Again, we can expect IR drops of an unpredictable nature. For example, variations in power supply current draw will add to the ground-referenced analog signals, which clearly causes trouble.

More uncertainty will occur if the analog sensors (which we may presume to be at some distance from the DAS) have a connection to earth ground (#6a) and DAS circuit common (#5), along with connection #1b. If the common connection for the power supplies is tied to earth ground (#1a), there are probably even more multiple current paths of uncertain impedance.

Clearly, we need to find a way to simplify and organize these ground connections so that we get the performance we expect. For that, see part 2.