A phase-locked loop (PLL) for analog signals generates an output with a phase that’s precisely matched to the phase of an input reference. Analog PLLs are widely used in high-frequency applications like communication systems and scientific equipment that need low jitter and precise synchronization. This article begins by looking at how PLLs for analog signals […]
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What are the advantages of a three op-amp instrumentation amplifier?
An instrumentation amplifier (INA) built using three operational amplifiers (op amps) can provide performance advantages in terms of high input impedance, low output impedance, easily adjustable gain, excellent common-mode rejection ratio (CMRR), high accuracy, and high open-loop gain. This article examines the basic design of INAs and their performance benefits, then discusses some application considerations, […]
What are the three types of logic level translators (LLTs)?
Logic-level translators (LLTs) are electronic circuits that enable communication between devices operating at different voltage levels, such as 3.3V and 5V. Also known as voltage-level translators or level shifters, LLTs convert signals between incompatible logic standards. This article outlines key LLT specifications and features, reviewing bidirectional, high-to-low, and low-to-high LLTs. It also explores the role […]
How AI and ML optimize functional verification for EDA
Functional verification ensures that the register transfer layer (RTL) implementation of semiconductor designs operates according to specified requirements. Electronic engineers typically perform functional verification using hardware verification languages (HVLs) such as SystemVerilog paired with the universal verification methodology (UVM). Other HVLs, such as VHSIC Hardware Description Language (VHDL) and Property Specification Language (PSL), may be […]
EE Training Days kicks-off 2025 with The A to Z of Multi-die Design
Did you know that multi-die architectures now represent over 50% of new semiconductor designs, marking a significant shift in chip development strategy? It’s true. There’s now a clear trend towards more multi-die designs, especially in data center, AI, and server applications where the complexity of the chips is too large to fit on a single […]
What is formal verification, and why is it important?
Formal verification uses mathematical analysis to ensure semiconductor designs perform as intended. Typically automated, it efficiently identifies critical design errors, such as deadlocks, race conditions, and unreachable states. This article reviews the fundamentals of formal verification in semiconductor design, explores its integration with simulation for comprehensive validation, and highlights strategies for optimizing implementation. Defining formal […]
Empowering innovation: OpenROAD and the future of open-source EDA
Many electronic design automation (EDA) tools remain out of reach for semiconductor startups and research organizations. However, a growing number of open-source EDA solutions are bridging the affordability gap and democratizing advanced chip design. This article discusses how tools like OpenROAD and OpenLane lower entry barriers, reduce development costs, and drive innovation. It also explores how […]
How hardware-assisted verification (HAV) transforms EDA workflows
Many semiconductor companies rely on hardware-assisted verification (HAV) to optimize sophisticated monolithic system-on-chip (SoC) designs and chiplet architectures. HAV streamlines verification and validation by integrating emulation, field-programmable gate array (FPGA) prototyping, and virtual platforms. This approach enables design engineers to efficiently verify individual components and system-wide interactions while validating functionality at granular and system-wide levels. […]
Parasitic extraction in EDA: what it is and why it matters
Parasitic extraction (PEX) in electronic design automation (EDA) calculates parasitic effects — such as capacitances, resistances, and inductance — within integrated circuits (ICs). Parasitics are introduced during the physical manufacturing process in semiconductor foundries, affecting both IC devices and their interconnects (Figure 1). This article explores the three primary categories of parasitic effects, compares field […]
What are the different types of AI accelerators?
Whether in data centers or at the edge, artificial intelligence (AI) accelerators address the limitations of traditional von Neumann architecture by rapidly processing massive datasets. Despite the gradual slowing of Moore’s law, these accelerators efficiently enable key applications such as generative AI (GenAI), deep reinforcement learning (DRL), advanced driver assistance systems (ADAS), smart edge devices, […]
