The Plural-DSP analog-to-digital converter family from Silanna Semiconductor integrates a proprietary converter core with on-chip DSP to reduce system complexity in signal-chain designs. Available in 12-, 14-, and 16-bit resolutions with sampling rates from 5 to 250 MSPS, the Plural-DSP ADC family supports functions such as decimation, digital down-conversion, interleaving, and IQ-mismatch correction, eliminating the need for external FPGA resources in industrial, medical, military, and communications applications.
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