Chi-Ping Hsu, Cadence
In a recent Design World article titled, “What Will 2015 Bring? A New Electronics System Design Imperative,” we talked about the astonishing technological changes we’re undergoing in electronics system design. But there’s another transformation happening before our eyes. It’s akin to the masses tearing down the Berlin Wall: Organizations are starting to dismantle the boundaries, open lines of communication and normalize relations among engineers and engineering teams.
It’s a profound change—albeit one not happening overnight—but it’s inextricably linked to how we’re designing electronics systems today. As we design at higher levels of abstraction, leverage much more IP than ever and shift design and verification left to improve our productivity, we are seeing the value of a new breed of engineer.
These engineers are equipped with cross-domain experiences and skills. Yes, we see the macro trend in new disciplines like bio-engineering, but it is also happening within disciplines like electrical engineering, and even the sub-discipline of chip design. They are New Age engineers who have shed the shackles of the old regime and boldly explored new high-profile, high-risk expanses.
Tear Down that Wall
Thanks in part to technological transformation, the old foundations on which organizational and job scopes have traditionally been based are crumbling of their own weight and in many cases are being torn down like the Berlin Wall.
The age of the compartmentalized engineer has reached its limitations in many organizations. The desperate need for co-design, co-analysis and co-optimization to drive differentiation is fostering a new breed of engineer who has unprecedented cross-domain expertise and superior collaboration skills.
Consider analog/digital integration. As Moore’s law has ably driven forward digital design density, it has been rougher going for the inevitable analog content in SoCs. Why? In a word, variation. For analog, the alternative of not scaling at the same pace as digital reached an economic tipping point, and digital compensation and calibration schemes are becoming popular. The side effect of this strategy is that designs have many more feedback loops between the analog transistors and the digital transistors. That forces the formerly strict engineer divide along digital and analog boundaries to break down.
However, it is not just crumbling foundations that are driving the change; the limitations of scope also are being reached. To create more compelling, differentiated products, systems companies are taking control over the design of more of the subcomponents of their products in order to create optimization opportunities across the elements.
For example, leaders in the smart phone market co-optimize new features in their processor chips and critical software elements for performance and energy for tasks such as web browsing and video playback. This trend of enabling system design companies to create more-compelling products means they need an engineering force that can use the added dimensions of design control in an effective, if not optimal, manner.
There are many other examples. What they all have in common—be they driven from crumbling foundations or by the drive towards optimal design—is that execution requires expertise across what used to be hard-and-fast boundaries.
New and Re-Examined Engineers
The age of the compartmentalized engineer has reached its limitations in many organizations. The desperate need for co-design, co-analysis and co-optimization to drive differentiation is fostering a new breed of engineer who has unprecedented cross-domain expertise and superior collaboration skills.
Here’s a sampling of these new age engineering job descriptions:
- Mixed-signal verification engineer – Analog and digital design expertise, along with being deeply versed in the most advanced SoC verification practices.
- Power architect – Systems to signoff expertise, along with deep knowledge in EDA flows to uncover energy usage profiles and discover optimization opportunities from software through silicon.
- Hardware/software verification engineer – Deeply versed in combing through the throngs of data in complex software stacks and SoC verification environments. Must be able to set up, execute and drive software-driven verification-closure methodology.
- Multi-fabric analysis engineer – Capable of navigating chip I/O planning, package design and PCB layout. Must be able to drive tradeoffs across these fabrics to satisfy system requirements, but also recognize opportunities for optimizations of cost, power, performance and robustness.
- Superstar cum engineer – Imaging the possibilities with a creative flair is a starting point for many new products. With such richness of platforms and technologies available as foundations, expect many more people like Will.I.Am (the Black Eyed Peas rapper who is launching his own wearable design) to enter the fray and declare themselves engineers.
Moving Forward
While the exceptional engineers who have already mastered multi-environment solutions are setting the trends and providing new levels of value, there are a number of improvements that can help many more transcend their specialty.
The baseline is providing interoperability such as open access offers between analog and digital domains. Next is the capability for the cross-domain sharing of analysis tools. This sharing enables the same results to be understood in the context of familiarity, as well as offers a direct link from analysis to mitigation.
Verification debug environments shared by simulation, emulation and formal analysis tools are a great example. New and merged environments provide paradigms that are, in nature, cross-domain. These paradigms are growing out of core analysis engines, such as those being used for cross-fabric chip/package/board power and signal integrity analysis. Of course, there is also a litany of courses, videos, workshops, articles and user-group resources available for engineers looking to get started on broadening their horizons.
Unlike the Berlin Wall, it’s doubtful we’ll sell pieces of the old engineering org charts as keepsakes. Instead, we forge ahead and welcome Will.I.Am to our party! Engineers and the Will.I.Ams of the world who can fill these positions will be prized and well-rewarded team members, poised for leadership in the new era.
Chi-Ping Hsu is senior vice president and chief strategy officer for EDA at Cadence. Prior to joining Cadence in 2003, Hsu was president and chief operating officer of Get2Chip Inc. and before that held executive management positions at Avant! Corporation, where he was responsible for corporate and technology strategy, product development and marketing.
