Synopsys, Inc.today announced the release of the latest versions of its HSPICE, FineSim and CustomSim circuit simulation products. The growth in automotive electronics and transition to FinFET process nodes have led to a significant increase in IC design complexity and the need for rigorous analysis to validate design robustness across a broad set of design conditions and environment variables. The 2017.03 release extends Synopsys’ circuit simulation performance leadership, delivers new Monte Carlo-based variability analysis and provides advanced reliability analysis capabilities to accelerate AMS verification and enable robust AMS design.
FinFET designs have significantly larger post-layout parasitics, rendering high-precision simulation of such designs a formidable challenge. The 2017.03 release of FineSim SPICE helps address this challenge by delivering a 3X performance improvement for post-layout FinFET designs. This breakthrough is achieved through innovations in core engine and RC optimization algorithms targeted specifically towards FinFETs. The new release also delivers an additional 2X throughput improvement for multi-corner analysis by optimizing corner simulations based on circuit activity, enabling robust corner analysis for demanding automotive IC applications. Additionally, the 2017.03 release of HSPICE delivers 1.5X performance improvement for large post-layout FinFET designs such as I/O cells.
CustomSim has been the class-leading solution for high-performance, high-capacity simulation of large designs. The 2017.03 release extends this performance leadership by delivering 2X single-core performance and an additional 2X multi-core performance, targeted towards analog and mixed-signal post-layout designs. The CustomSim updates reflect a consistent and sustained focus on application-specific performance improvements, with previous releases delivering improvements for SRAM, Flash, and BCD (Bipolar-CMOS-DMOS) technologies.
The impact of variation is more prominent now due to worsening operating conditions—wider process voltage temperature (PVT) range, lower headroom—driven by automotive applications and FinFETs. Ensuring and verifying design robustness requires rigorous Monte Carlo-based variability analysis at multiple levels of design abstraction. The 2017.03 release of CustomSim delivers a 2X increase in Monte Carlo capacity, enabling users to run one-million-transistor designs or realize higher throughput for existing designs. The release also includes support in HSPICE, FineSim and CustomSim for Modified Distribution in Monte Carlo, allowing users to modify sampling distributions to better assess the impact of design outliers on performance and functionality. The new CustomSim release also delivers 2X performance for device aging and supports self-heating-aware electromigration simulation for FinFETs, thus enabling robust reliability analysis.
“With the advent of new IC applications for vertical markets such as automotive and FinFETs, ensuring design robustness has become a significant challenge, especially due to wider and more stringent requirements for performance and reliability,” said Bijan Kiani, vice president of marketing at Synopsys. “The latest circuit simulation releases enable designers to deliver robust AMS designs through significant performance benefits and advanced analysis capabilities.”