Agile Analog has launched its first range of analog subsystems, covering power management, PVT sensing, and sleep management. These innovative, digitally wrapped subsystems significantly reduce the effort required to integrate multiple analog IPs into any ASIC by allowing the IP to be dropped straight into a digital design flow and connected via a standard peripheral […]
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IP detects power fluctuations in chip designs
Agile Analog has designed an IR Drop Sensor for its growing library of analog IP. This is an important safety feature for designers as it monitors for voltage drops when current flows through a resistor, which is called IR drop, and can affect the timing of a chip and could result in functional failures if […]