Z-planner Enterprise is an all-in-one solution that enables hardware design teams to design and validate PCB stackups. With interfaces to the most common PCB layout and signal-integrity design flows, as well as the industry’s largest dielectric-materials library, Z-planner Enterprise enables engineers to perform all aspects of PCB stackup planning, design, and validation in a single platform.
Features of Z-planner Enterprise include:
- Full accounting for frequency, resin content, glass style, and pressed prepreg thickness
- Unlimited stackup-layer support, including automated calculation of width and spacing
- HyperLynx field solver—simulating impedance, as well as dielectric and copper losses
- Automated impedance goal seeking across multiple stackup-signal layers
- Glass awareness and glass-weave skew prevention
- Design for Manufacturing (DFM) and Design for Signal Integrity (DFSI) rules, management and checking
- Compare multiple PCB fabricator stackups to design specifications
- Stackup Manager allows for stackup reuse, tracking layer count, impedance groups, and signal/power/ground layer assignments.
- Built-in library filters for common constraints like halogen-free materials,
dual-ply cores, and a complete set of the IPC-4101 slash sheets
- Custom library filters using any mechanical or electrical material parameters
Additionally, Z-planner Enterprise offers access to other Z-zero features, including Z-solver, a detailed cross-section analysis tool, the comprehensive Z-zero laminate library, and a Material MapperT.